--------------------------------------------------------------------------------------------------- -- -- Title : sondab -- Design : sondab -- Author : 0 -- Company : 0 -- --------------------------------------------------------------------------------------------------- -- -- File : sondab.vhd -- Generated : Fri May 14 22:57:24 2004 -- From : interface description file -- By : Itf2Vhdl ver. 1.20 -- --------------------------------------------------------------------------------------------------- -- -- Description : -- --------------------------------------------------------------------------------------------------- --{{ Section below this comment is automatically maintained -- and may be overwritten --{entity {sondab} architecture {sondab}} library IEEE; use IEEE.STD_LOGIC_1164.all; entity sondab is port( A : in boolean; B : in boolean; C : in boolean; F : inout boolean; G : out boolean; E : inout boolean ); end sondab; --}} End of automatically maintained section architecture sondab of sondab is begin process (A,E) begin F<=not(A and E); end process; process (B,C) begin E<=not((not B)and C); end process; process (F,E) begin G<=not(F and E ); end process; end sondab;